🎉 CONGRATULATIONS 🎉
It’s a verified certificate from Intern Certify
- Learner Full Name : JADDA SIVA PARVATHI
- Internship Course : VLSI(RTL Design with Verilog)
- Duration : 13/05/2026 to 14/07/2026
- Roll No : 238T1A0418
- College : DBS Institute of Technology,Kavali
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